(1) Field of the Invention
The present invention relates to methods used to fabricate semiconductor devices, and more specifically to a method used to form source/drain regions, for metal oxide semiconductor field effect, (MOSFET), devices, via ion implantation and rapid thermal anneal, (RTA), procedures.
(2) Description of Prior Art
The use of sub-micron MOSFET devices, for logic as well as memory applications, has focused attention on the methods used to form shallow MOSFET source/drain regions. Conventional ion implantation procedures have been used to place a specific dose of implanted species, at a specific location in the region of a semiconductor substrate used for the source/drain regions. A high temperature anneal procedure is then used to distribute the implanted ions, resulting in the desired source/drain region. These procedures however, when used for sub-micron MOSFET devices, (or devices with channel lengths less than 0.25 um), can result in undesired source/drain--substrate leakages, due to crystal defects in the semiconductor substrate. The crystal defects can result from a high, source/drain, ion implantation dose, concentrated at one specific region in the semiconductor substrate. In addition a subsequent anneal procedure, used to activate the implanted species, has to be performed at a temperature high enough to distribute the implanted species, from the specific implanted location in the substrate, throughout the source/drain region. This high temperature anneal procedure results in unwanted dopant movement, at other locations in the MOSFET device, as well as aggravating the crystal defect formation.
This invention will describe a combination of processes, comprised of a novel ion implantation procedure, followed by a low temperature RTA procedure, used to create shallow source/drain regions, for sub-micron MOSFET devices. The ion implantation procedure features the use of a sequence of ion implantation steps, each performed at a specific energy and a specific dose, thus avoiding the placement of one large implanted dose, in one location of the subsequent source/drain region, reducing the risk of crystal damage. The placement of implanted species in several locations of the subsequent shallow source/drain region, relaxes the RTA temperature needed for distribution of the implanted species, also reducing the risk of crystal defect formation. Prior art, such as Gardner et al, in U.S. Pat. No. 5,793,090, describe a sequence of ion implantation steps used to form a source/drain region, however that prior art does not feature the unique combination of implant doses, or the use of a low temperature anneal procedure, used in this present invention.